SK hynix Announces H-TPU SSD Controller Architecture
SK hynix introduces a new processor architecture designed for SSD controller workloads at the 2026 International SoC Design Conference.
SK hynix has introduced the H-TPU, a processor architecture specifically designed for SSD controller workloads. The technology was presented at the 2026 International SoC Design Conference in South Korea.
The H-TPU features a programmable transaction processor with multiple functional units and a simplified four-stage pipeline. Each core takes up roughly one twenty-fifth of the space of a general-purpose CPU core and uses about 2.5% of its power. The architecture is focused on storage control, not AI tasks like neural-network training or inference.
SK hynix plans to apply H-TPU technology to future NAND products, including enterprise SSD controllers. The company intends to combine it with Storage Next and high-bandwidth flash products.
Key facts
- H-TPU introduced by SK hynix for SSD controller workloads
- Presented at the 2026 International SoC Design Conference
- Each H-TPU core occupies about 4% of a general-purpose CPU core’s area
- Power consumption is approximately 2.5% of a comparable conventional CPU implementation
Sources
- Guru3DSK hynix H-TPU Targets SSD Controllers With 2.5% of Conventional CPU Power
- Tom's HardwareSK hynix to place custom tiny CPU cores in its SSD controllers to ease Arm load as drive speeds rocket
